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TitleEmbedded Systems Architecture: A Comprehensive Guide for Engineers and Programmers
Author
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Total Pages657
Table of Contents
                            Embedded Systems Architecture
Copyright Page
Contents
Foreword
Acknowledgments
About the Author
Section I: Introduction to Embedded Systems
	Chapter 1. A Systems Engineering Approach to Embedded Systems Design
		1.1 What Is an Embedded System?
		1.2 Embedded Systems Design
		1.3 An Introduction to Embedded Systems Architecture
		1.4 Why Is the Architecture of an Embedded System Important?
		1.5 The Embedded Systems Model
		1.6 Summary
		Chapter 1 Problems
	Chapter 2. Know Your Standards
		2.1 An Overview of Programming Languages and Examples of Their Standards
		2.2 Standards and Networking
		2.3 Multiple Standards-Based Device Example: Digital Television (DTV)
		2.4 Summary
		Chapter 2 Problems
Section II: Embedded Hardware
	Chapter 3. Embedded Hardware Building Blocks and the Embedded Board
		3.1 Lesson One on Hardware: Learn to Read a Schematic!
		3.2 The Embedded Board and the von Neumann Model
		3.3 Powering the Hardware
		3.4 Basic Hardware Materials: Conductors, Insulators, and Semiconductors
		3.5 Common Passive Components on Boards and in Chips: Resistors, Capacitors, and Inductors
		3.6 Semiconductors and the Active Building Blocks of Processors and Memory
		3.7 Putting It All Together: The Integrated Circuit (IC)
		3.8 Summary
		Chapter 3 Problems
	Chapter 4. Embedded Processors
		4.1 ISA Architecture Models
		4.2 Internal Processor Design
		4.3 Processor Performance
		4.4 Reading a Processor’s Datasheet
		4.5 Summary
		Chapter 4 Problems
	Chapter 5. Board Memory
		5.1 Read-Only Memory (ROM)
		5.2 Random-Access Memory (RAM)
		5.3 Auxiliary Memory
		5.4 Memory Management of External Memory
		5.5 Board Memory and Performance
		5.6 Summary
		Chapter 5 Problems
	Chapter 6. Board I/O (Input/Output)
		6.1 Managing Data: Serial vs. Parallel I/O
		6.2 Interfacing the I/O Components
		6.3 I/O and Performance
		6.4 Summary
		Chapter 6 Problems
	Chapter 7. Board Buses
		7.1 Bus Arbitration and Timing
		7.2 Integrating the Bus with Other Board Components
		7.3 Bus Performance
		7.4 Summary
		Chapter 7 Problems
Section III: Embedded Software Introduction
	Chapter 8. Device Drivers
		8.1 Example 1: Device Drivers for Interrupt-Handling
		8.2 Example 2: Memory Device Drivers
		8.3 Example 3: On-board Bus Device Drivers
		8.4 Board I/O Driver Examples
		8.5 Summary
		Chapter 8 Problems
	Chapter 9. Embedded Operating Systems
		9.1 What Is a Process?
		9.2 Multitasking and Process Management
		9.3 Memory Management
		9.4 I/O and File System Management
		9.5 OS Standards Example: POSIX (Portable Operating System Interface)
		9.6 OS Performance Guidelines
		9.7 OSes and Board Support Packages (BSPs)
		9.8 Summary
		Chapter 9 Problems
	Chapter 10. Middleware and Application Software
		10.1 What Is Middleware?
		10.2 What Is an Application?
		10.3 Middleware Examples
		10.4 Application Layer Software Examples
		10.5 Summary
		Chapter 10 Problems
Section IV: Putting It All Together: Design and Development
	Chapter 11. Defining the System—Creating the Architecture and Documenting the Design
		11.1 Creating an Embedded System Architecture
		11.2 Summary
		Chapter 11 Problems
	Chapter 12. The Final Phases of Embedded Design: Implementation and Testing
		12.1 Implementing the Design
		12.2 Quality Assurance and Testing of the Design
		12.3 Conclusion: Maintaining the Embedded System and Beyond
		Chapter 12 Problems
Appendix A. Projects and Exercises
	Section I Projects
	Section II Projects
	Section III Projects
	Section IV Projects
Appendix B. Schematic Symbols
Appendix C. Acronyms and Abbreviations
Appendix D. Glossary
Index
What’s on the CD-ROM
                        
Document Text Contents
Page 2

Embedded Systems Architecture

Page 328

Device Drivers

313

Figure 8-3a shows a hardware block diagram of a MPC860-based board, and Figure 8-3b
shows a systems diagram that includes examples of both MPC860 processor-specific device
drivers, as well as generic device drivers.

Figure 8-3a: MPC860 hardware block diagram [8-2]

Copyright of Freescale Semiconductor, Inc. 2004. Used by permission.

Figure 8-3b: MPC860 architecture specific device driver system stack
Copyright of Freescale Semiconductor, Inc. 2004. Used by permission.

Ethernet

Optiona l
CAM

MPC860

RJ-45
EEST

MC68160

RS-422

TP
AUI

D-15
Localtalk

T1/E1 Line

T1/E1
Transceiver

S/T/U
ISDN-Basic or Primary

TDM-B

TDM-A

Local
Terminal

Serial EEPR OM MCM2814

RS-232

S/T/U
Transevr

SCC1

SCC2

32-bit
RISC

Time
Slot

Assigner

SMC2

SPI

Po wer
PC

Core

Memory
Cntrlr

IDMA 1
IDMA 2

PCMCIA

Peripheral

Buffers
Port A
Port B

Peripheral 1
Peripheral 2

PCI
Bus

Qspan-860

DRAM SIMM
16 or 32-bits

8, 16, or 32-bit
Boot ROM

Glue

I2C

SCC3

SCC4
SMC1

System Software Layer

Application Software Laye r

RS-232 (SMC2)

ISDN (TDM )

Ethernet (SCCI)

T1/E1 (TDM )

. . .

PCMCIA

.. .

I2C

DMA (IDMA)

L1 Cache

MMU

Interrupts

. . .

Timers

I/O Buses

Hardware Layer

Memory Other

Generic (Architecture and Board Specif ic Driver) Architecture Specif ic Device Drivers

Page 329

Chapter 8

314

Regardless of the type of device driver or the hardware it manages, all device drivers are
generally made up of all or some combination of the following functions:

Hardware Startup, initialization of the hardware upon power-on or reset.

Hardware Shutdown, configuring hardware into its power-off state.

Hardware Disable, allowing other software to disable hardware on-the-fly.

Hardware Enable, allowing other software to enable hardware on-the-fly.

Hardware Acquire, allowing other software to gain singular (locking) access to
hardware.

Hardware Release, allowing other software to free (unlock) hardware.

Hardware Read, allowing other software to read data from hardware.

Hardware Write, allowing other software to write data to hardware.

Hardware Install, allowing other software to install new hardware on-the-fly.

Hardware Uninstall, allowing other software to remove installed hardware on-the-fly.

Of course, device drivers may have additional functions, but some or all of the functions
shown above are what device drivers inherently have in common. These functions are based
upon the software’s implicit perception of hardware, which is that hardware is in one of
three states at any given time—inactive, busy, or �nished. Hardware in the inactive state
is interpreted as being either disconnected (thus the need for an install function), without
power (hence the need for an initialization routine) or disabled (thus the need for an enable
routine). The busy and finished states are active hardware states, as opposed to inactive; thus
the need for uninstall, shutdown and/or disable functionality. Hardware that is in a busy state
is actively processing some type of data and is not idle, and thus may require some type of
release mechanism. Hardware that is
in the finished state is in an idle state,
which then allows for acquisition,
read, or write requests, for example.

Again, device drivers may have all
or some of these functions, and can
integrate some of these functions into
single larger functions. Each of these
driver functions typically has code that
interfaces directly to the hardware and
code that interfaces to higher layers
of software. In some cases, the dis-
tinction between these layers is clear,
while in other drivers, the code is
tightly integrated (see Figure 8-4). Figure 8-4: Driver code layers

Hardware Layer

System Software Laye r

Application Laye r

Device Driver Layer

Higher-layer Interface

Hardware Interface

Higher-layer Interface

Hardware Interface

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